UNIFIED REVERSE CONVERSION ARCHITECTURES FOR SOME POWERS OF TWO MODULI SETS

Abstract

Residue Number System (RNS) has found a wide spread usage in a number of digital signal processing applications such as digital filtering, Discrete Fourier transform , Convolution, Correlation, communication, and cryptography. This is due to the following RNS inherent features: modularity, parallelism, carry free addition, borrow free subtraction, and fault tolerance. The major challenges ofRNS architecture lie in moduli set selection and in the reverse conversion (conversion from residue representation to weighted representation). Reverse Conversion (RC) can be achieved either by the traditional Chinese Remainder Theorem (CRT), Mixed Radix Conversion (MRC) or the recently introduced new CRTs 1- , (CRT I and II). Several moduli sets have been proposed with algorithms designed for performing RC. In this thesis, two pair of moduli sets : {22n+1 - 1, 2n, 2n+1 - 1} and {22n+1 - 1, 22n, 2n+1 - 1} and {2n+l_ 1, 22n, 2n+1 + 1} and {2(3n+2)/2 - 1, 22n, 2(3n+2)/2 + 1} are proposed together with unified architecture for efficient reverse conversion. We also propose a unified architecture for efficient reverse conversion in existing moduli sets {2n - 1, 2n + 1, 2n, 22n+1 - 1} and {2n - 1, 2n + 1, 22n, 22n+1 - 1}. Both theoretical and experimental results (from Xilinx ISE 14.3) suggest that the proposed schemes outperform the known related state of the art schemes in terms of area and delay.